No images or website preview available for this project.

    Custom ISA CPU Simulator

    A Harvard-style CPU simulator in C for a custom 16-bit ISA: assembler parser, 64 general-purpose registers, status flags (carry, overflow, negative, sign, zero), and a fetch–decode–execute pipeline that runs programs such as factorial.asm.

    Technologies Used

    C
    Computer Architecture
    ISA Design
    Assembler
    Pipelining
    View Code